1. Field of the Invention
The invention relates to an operational amplifier with a push-pull output stage and more specifically to a high slew rate operational amplifier.
2. Description of the Related Art
FIG. 1 is a diagram showing a structure of a conventional operational amplifier to which the present invention relates. In FIG. 1, the operational amplifier 1 comprises a differential amplifier 10 for providing an amplified output Vio in response to the differential between input voltage V+and Vxe2x88x92and an output push-pull amplifier 20 for providing an output Vo in response to the intermediate output Vio from the amplifier 10. The output push-pull amplifier 20 includes a push-pull transistor stage comprising an NPN transistor T3 having its collector connected to a positive power supply conductor Vp, a PNP transistor T4 having its collector connected to a negative power supply conductor Vn, and serially coupled resistors R1 and R2 inserted between the emitters of the transistors T3 and T4 (hereinafter, referred to as xe2x80x9cthe push-pull transistorsxe2x80x9d). To the base of the push-pull first transistor T3, there are connected the cathode of a constant current source S1 having its anode connected to the positive power supply conductor Vp and the emitter of a PNP driving transistor T1 of which the collector is connected to the negative power supply conductor Vn. To the base of the push-pull second transistor T4, there are connected the anode of a constant current source S2 having its cathode connected to the negative power supply conductor Vn and the emitter of an NPN driving transistor T2 of which the collector is connected to the positive power supply conductor Vp. The bases of the driving transistors T1 and T2 are commonly connected to the output Vio of the amplifier circuit 10 and one end of a capacitor C, the other end of which is connected to the negative power supply conductor Vn.
In order to raise the slew rate of the output Vo, the push-pull amplifier is so configured that the push-pull transistors T3 and T4 are always in ON state and accordingly always pass a certain-level current, which we call xe2x80x9cthe through currentxe2x80x9d. The present invention relates to operational amplifiers as shown in FIG. 1.
Such high slew rate operational amplifiers are used, for example, in electronic control units (ECUs) of an engine and various electronic devices mounted in an automobile. Since it is necessary to make ECUs smaller and lighter, it is necessary to integrate a circuit including one or more operational amplifiers and an output circuit for driving a load into a single chip IC (integrated circuit). The calorific volume of the IC on a chip is one of the factors that limit the size of the IC. For this reason, in order to increase the integration degree of an IC, it is preferable to reduce the calorific volume of an IC. Reducing the through current which flows through the push-pull transistors T3 and T4 is one of effective techniques we can use to suppress the calorific volume of an operational amplifier circuit.
It is an object of the invention to provide a high slew rate operational amplifier circuit that enables the through current of its push-pull transistors to be reduced substantially to zero.
It is another object of the invention to provide an IC including a high slew rate operational amplifier circuit that enables the through current of its push-pull transistors to be reduced substantially to zero.
According to the invention, a high slew rate operational amplifier circuit of which the through current of its push-pull transistors is substantially zero is provided. The invention is applicable to an operational amplifier circuit that comprises an amplifier portion for receiving a non-inverting input and an inverting input and providing an amplified output in response to the differential between the non-inverting input and the inverting input; and a push-pull amplifier for providing a final output in response to the amplified output. The push-pull amplifier preferably includes an NPN output transistor having its collector connected to a higher-potential conductor; a PNP output transistor having its collector connected to a lower-potential conductor; two serially connected resistors that are connected between emitters of the NPN and PNP output transistors, a node between the resistors serving as an output of the operational amplifier circuit, a PNP driving transistor having its base coupled with the amplified output and its emitter connected to a base of the NPN output transistor, a collector of the PNP driver transistor being connected to the lower-potential conductor; a first current source connected between the higher-potential conductor and an emitter of the PNP driving transistor; an NPN driving transistor having its base coupled with the amplified output and its emitter connected to a base of the PNP output transistor, a collector of the NPN driver transistor being connected to the higher-potential conductor; and a second current source connected between the lower-potential conductor and an-emitter of the NPN driving transistor.
As circuit means for reducing a through current flowing through the NPN and PNP output transistors, the push-pull amplifier further comprises: a first resistor inserted between the higher-potential conductor and the first current source; a second resistor inserted between the second current source and the lower-potential conductor; an NPN transistor which is so connected with the NPN output transistor as to constitute a first current mirror and which has its emitter connected to a node between the second current source and the second resistor; and a PNP transistor which is so connected with the PNP output transistor as to constitute a second current mirror and which has its emitter connected to a node between the first resistor and the first current source.